IQM Reports Full-Chip Entanglement Across 54 Qubits
Achieving entanglement with a full quantum processor presents a significant challenge. Though entangling two, three, or even a small cluster of qubits is a routine task, the difficulty escalates dramatically when the goal is to entangle every single qubit on a processor simultaneously, making the entire device behave as one coherent, correlated object. Most hardware providers often avoid this level of entanglement, and instead opt to utilize only a fraction of their available qubits.
However, IQM reports that it has successfully achieved this feat across its entire 54-qubit, cloud-accessible Emerald system. All qubits were entangled simultaneously into a single Greenberger–Horne–Zeilinger (GHZ) state.
The Challenge of Whole-Chip Entanglement
Consider a stadium wave: organizing ten people in a section to stand and sit in sync is straightforward. However, coordinating 54,000 seats to form an unbroken wave, with perfect timing from every participant, requires every section and every junction between sections to act in unison. A single misstep can cause the entire correlation to collapse.
A GHZ state is the quantum equivalent of this wave. Each qubit exists in a superposition intrinsically linked to every other qubit, meaning a measurement on one instantly influences the rest. As more qubits become involved, the state becomes increasingly fragile, as any faulty gate or noisy idle qubit can degrade its fidelity. This fragility explains why large quantum chips frequently run algorithms on only 10 to 20 qubits, despite having many more available. The individual hardware components function, but making them all work together seamlessly is the true hurdle.
Demonstration Scale and Results
IQM demonstrated a system-wide GHZ state across its 54-qubit superconducting Emerald processor and subsequently measured the quality of this state.
Key results include:
- 54 qubits entangled simultaneously, utilizing the full register.
- A fidelity of 0.516 across all 54 qubits, with readout error mitigation applied.
- A fidelity of 0.515 for 40 qubits, achieved without any error mitigation.
- The classical threshold for entanglement is 0.500; values above this indicate genuine entanglement, not statistical noise.
- A reduction of up to 50% in quantum operation error rates, achieved through a year of calibration efforts.
These fidelity figures, though slightly above the 0.500 threshold, are significant because they confirm that the entanglement is real, distinguishing it from mere statistical noise. The 0.515 fidelity at 40 qubits without mitigation is particularly robust, as it demonstrates the bare hardware’s ability to clear the threshold before any software-based error correction applies to the readout.
Achieving System-Wide Entanglement
The breakthrough was not achieved through brute force. IQM attributes its success to an automated state-preparation routine. This routine intelligently selects the appropriate two-qubit gates and their sequence, balancing each gate’s fidelity against the idle time experienced by qubits waiting their turn. Idle qubits are susceptible to decoherence, meaning any qubit awaiting its turn in the circuit risks losing its quantum information. Minimizing this idle time is therefore crucial.
“Entangling the entire chip means every qubit and every connection between them has to work correctly in the same circuit,” stated Craig Ciesla, CTO of IQM. “Getting there came down to being smarter about how we prepare the state itself, choosing the gate order to keep idle time to a minimum.”
Additional improvements stemmed from a year of rigorous work, including an updated calibration method, an optimized gate set, dynamic decoupling to protect idle qubits, and a qubit selection process that mitigates weak links. For context, a 27-qubit superconducting GHZ demonstration was verified and published on arXiv in 2021. Doubling that register on a commercial cloud system represents significant progress in quantum scaling.
The Value of a Correlated Processor
System-wide entanglement is a fundamental prerequisite for achieving error-corrected logical qubits, which are the ultimate goal in quantum computing. A logical qubit is constructed from multiple physical qubits working in unison, a process that is impossible without full device entanglement. Demonstrating the chip’s coherence at full scale is a crucial step before it can reliably host a protected quantum memory.
This scaling also has implications for post-quantum migration. NIST IR 8547 targets 2030 for the deprecation of RSA, ECDSA, ECDH, and Diffie-Hellman, with a full disallowance by 2035. While larger coherent processors do not pose an immediate threat to these schemes, they accelerate the timeline.
The “harvest-now-decrypt-later” threat is already influencing real-world decisions, such as Zcash’s proposal to issue dedicated viewing keys for every ZEC swap to reduce future quantum exposure. Neither Quantum Key Distribution (QKD) nor Quantum Random Number Generation (QRNG) directly solve this problem; they address key distribution and randomness generation. The transition away from vulnerable public-key cryptography is primarily a software undertaking, for which the FIPS 203/204/205 standards have been developed.
While a 0.516 fidelity will not compromise current encryption, it marks an important milestone on the journey toward practical quantum computing. The journey itself is critical, and this represents another verified step forward.
For further information, explore QNews’s coverage of how developers reduced quantum-safe Bitcoin transaction costs to below $70.