New Chip Design Could Cut AI Energy Use 10,000-Fold

Researchers from Extropic Corp. and MIT have proposed a computer chip that runs certain AI tasks on conventional transistors using about 10,000 times less energy than a GPU. The design leans on controlled randomness and not the exact arithmetic that ordinary processors perform. The claim rests on simulations and one physically tested circuit, not a finished machine, which the authors are upfront about.

How the chip trades certainty for randomness

The work, published in npj Unconventional Computing and led by a team that includes quantum information scientist Isaac Chuang, starts from a problem the AI industry can no longer wave away. The researchers note that U.S. firms now spend more each year on AI data centers than the inflation-adjusted cost of the Apollo program, and that by 2030 those data centers could draw around 10% of all electricity produced in the country.

Their argument is that squeezing more efficiency out of GPUs misses a deeper point. AI algorithms grew up shaped by the hardware that happened to be available, a pattern the field calls the hardware lottery, and different hardware could open the door to methods that burn far less power.

Their answer is a probabilistic computer, one that calculates by manipulating probability distributions instead of grinding through deterministic math. They call the design the Denoising Thermodynamic Computer Architecture, or DTCA. The building block is a Boltzmann machine, a model borrowed from statistical physics that assigns probabilities to different possible outcomes, and the chip packs thousands of tiny sampling circuits into arrays that run these models in parallel.

Anyone who has worked near quantum annealing will recognize the ingredients, since Boltzmann machines and Ising models show up there too, though nothing about this chip is quantum.

Getting around the walls that stalled earlier designs

Earlier probabilistic computers hit two walls. They tried to cram an entire dataset into one large energy-based model, which gets harder and slower to sample as the data grows more complex, a snag the authors call the mixing-expressivity tradeoff. They also relied on exotic parts such as magnetic tunnel junctions to generate their randomness, components that don’t slot neatly into standard chip manufacturing.

The DTCA sidesteps both. It borrows the core trick from diffusion models, the technique behind modern image generators, and breaks the job into a chain of simple denoising steps that each nudge random noise a little closer to structured data. It also builds its randomness from ordinary CMOS transistors. The team fabricated and tested an all-transistor random number generator, and it behaved as expected even under the manufacturing variation that real fabrication throws at a circuit.

Why the 10,000-times figure comes with an asterisk

The headline number came from a benchmark called Fashion-MNIST, a simple image dataset used to test machine learning systems. After simulating their proposed hardware on GPUs, the researchers fed in energy measurements from the transistor circuit they built and estimated that the chip could generate images on par with GPU implementations using about 10,000 times less energy per sample. This figure describes a future device as opposed to readings from a working computer, and the distinction is important.

The team also tried a hybrid setup that pairs a small neural network with the thermodynamic hardware. The network compresses CIFAR-10 images into a binary form, the probabilistic computer handles the generation, and the combination matched a conventional generative adversarial network using around a tenth as many neural-network parameters on the deterministic side. The researchers see this split, which they call hybrid thermodynamic-deterministic machine learning, as more realistic than asking probabilistic hardware to do everything.

What still stands between the idea and a true chip

Then come the caveats, and there are many. Only the random number generator exists in silicon, whereas the full architecture stays on paper. The datasets tested are far simpler than the large language models and cutting-edge image generators that define the state of the art, and the team’s own results show their system sits well below the best neural networks on raw modeling power. The hardest unsolved piece is scaling.

Simply making the models bigger or more connected stops helping past a point, so more algorithmic work is needed before this could touch the largest AI workloads. The authors frame the paper as a first step as opposed to a product. In their words, the analysis establishes for the first time that a probabilistic computing system could substantially outperform traditional AI hardware, and makes a case for serious investment in developing it further. Whether that promise survives contact with a true chip remains the open question.