Altera, Riverlane Bring Quantum Error-Correction Support to Agilex

Altera and Riverlane have partnered to enable quantum error-correction workloads on Altera’s Agilex FPGAs. Indeed, their collaboration has produced Riverlane’s QEC Interface, a design example validated on an Agilex 7 chip and made available on a public GitHub repository.

Partnership Details

Specifically, the companies describe this collaboration as a partnership, and Riverlane will be joining Altera’s Solutions Acceleration Partner Program. Their stated goal is to assist quantum hardware developers in transferring error-correction data between control systems and decoding hardware with predictable timing. 

Altera identifies itself as the world’s largest pure-play FPGA solutions provider, and Riverlane is described in the announcement as the world leader in quantum error correction technology and tools.

The key deliverable is Riverlane’s QEC Interface (QECi), which standardizes the transfer of error-correction data between quantum control systems and QEC hardware. Riverlane has validated a QECi design example on an Agilex 7 FPGA and published it on GitHub, providing developers with a starting point. This is a reference design and code.

Evidentiary Scope

Farhad Shafai, an Altera vice president, stated that the validation on Agilex 7 and Agilex 9 FPGAs demonstrates how the company’s platforms can integrate quantum control and error-correction technologies. Marco Ghibaudi of Riverlane also noted that this work offers developers an accessible method to begin evaluating integration.

Performance claims remain general. Altera highlights “deterministic low latency” and high-speed connectivity, along with F-Tile transceivers capable of up to 64 Gsps and a 36 GHz RF range. These figures refer to the FPGA hardware specifications, not to any error-correction outcomes. 

The evidence lacks details such as logical qubit count, physical qubit count, logical-error-rate measurements, decoder throughput numbers, or the identification of a quantum processor. A design example validated on an FPGA does not constitute a measurement of error correction performed on actual qubits.

Information regarding product availability, licensing, pricing, or deployment timelines has not been disclosed. No customer or independent entity has confirmed using QECi on Agilex 7. All available evidence stems from the companies’ own announcement and subsequent reports, including an Altera LinkedIn post.

FPGA-based control and decoding represents a plausible foundational element for future error-corrected machines. This aligns with broader European policy developments, such as the proposed EU Quantum Act, and open-source initiatives like Fujitsu’s quantum application package. This partnership does not demonstrate fault tolerance or quantum advantage; instead, it provides developers with code for testing.